[coreboot-gerrit] [S] Change in coreboot[main]: mb/google/nissa/var/craaskov: Disable external fivr

[Ian Feng (Code Review)]

Ian Feng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81607?usp=email )

Change subject: mb/google/nissa/var/craaskov: Disable external fivr
......................................................................

mb/google/nissa/var/craaskov: Disable external fivr

In next phase, craaskov will remove external fivr.

BUG=b:330253778
TEST=boot to ChromeOS, cold reboot/suspend/recovery mode/install OS
work normally.

Change-Id: I9280a86bf78caa10b527a6569ac580dfe1d66f60
Signed-off-by: Ian Feng 
---
M src/mainboard/google/brya/variants/craaskov/overridetree.cb
1 file changed, 0 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/81607/1

diff --git a/src/mainboard/google/brya/variants/craaskov/overridetree.cb b/src/mainboard/google/brya/variants/craaskov/overridetree.cb
index 686c829..eee5402 100644
--- a/src/mainboard/google/brya/variants/craaskov/overridetree.cb
+++ b/src/mainboard/google/brya/variants/craaskov/overridetree.cb
@@ -60,21 +60,6 @@

register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"

-	# Configure external V1P05/Vnn/VnnSx Rails
-	register "ext_fivr_settings" = "{
-		.configure_ext_fivr = 1,
-		.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0,
-		.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
-		.vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX,
-		.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
-		.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE,
-		.v1p05_voltage_mv = 1050,
-		.vnn_voltage_mv = 780,
-		.vnn_sx_voltage_mv = 1050,
-		.v1p05_icc_max_ma = 500,
-		.vnn_icc_max_ma = 500,
-	}"
-
    register "serial_io_i2c_mode" = "{
    	[PchSerialIoIndexI2C0] = PchSerialIoPci,
    	[PchSerialIoIndexI2C1] = PchSerialIoPci,