[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/fsp/pci: Add size field to PCIe interrupt routing HOB

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Matt Papageorge, Felix Held.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55237 )

Change subject: soc/amd/common/fsp/pci: Add size field to PCIe interrupt routing HOB
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Patch Set 5:

(1 comment)

File src/soc/amd/common/fsp/pci/pci_routing_info.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120818):
https://review.coreboot.org/c/coreboot/+/55237/comment/49de8349_bd27b009 
PS5, Line 18: 	} __packed *routing_hob;
need consistent spacing around '*' (ctx:WxV)