Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44699 )
Change subject: soc/mediatek/mt8192: Add dram control register define and bits define ......................................................................
Patch Set 6:
(5 comments)
https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h:
https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... PS6, Line 128: DQS_8PH_DEGREE_45, Sort it?
https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... PS6, Line 157: u8 chn; Why not unsigned int? The architecture native type has to be used anyway?
https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... PS6, Line 158: u8 rank; Ditto?
https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... PS6, Line 159: u8 fsp; Please add a comment, what *fsp* is.
https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... PS6, Line 160: u8 density; : u8 *pll_mode; : u32 frequency; : u32 vcore_voltage; Use native types?