Attention is currently required from: Tim Wawrzynczak, Arthur Heymans, Andrey Petrov, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55142 )
Change subject: FSP2.0 platforms: Use bootloader reserved memory for BERT ......................................................................
Patch Set 4:
(2 comments)
File src/soc/intel/common/block/systemagent/memmap.c:
https://review.coreboot.org/c/coreboot/+/55142/comment/71ef9b28_1af3efaa PS3, Line 61: *start = cbmem_top(); : *size = CONFIG_ACPI_BERT_SIZE;
Yeah that makes sense to me, the extra MTRR is not necessary […]
There was some discussion here https://review.coreboot.org/c/coreboot/+/44014 w.r.t. top_of_ram -> TOLUD caching attributes.
File src/soc/intel/common/block/systemagent/systemagent.c:
https://review.coreboot.org/c/coreboot/+/55142/comment/c77714fa_79e38bef PS4, Line 196: Make sure to account for the fact that the FSP saves some of the : * reserved RAM for ACPI BERT One thing that I fear about is this getting out of sync with rest of the changes for BERT space allocation in the next refactor. There is nothing that will catch that the assumption is broken.