[coreboot-gerrit] Change in coreboot[master]: mb/google/kahlee: Adds register address mapping for FCH MISC

[Akshu Agrawal (Code Review)]

Akshu Agrawal has uploaded this change for review. ( https://review.coreboot.org/25263

Change subject: mb/google/kahlee: Adds register address mapping for FCH MISC
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mb/google/kahlee: Adds register address mapping for FCH MISC

Audio machine driver will enable/disable clock by making it as
a CCF clock in kernel.

BUG=b:74570989
TEST=aplay -vv <file>
check register to see clock enabled
kill aplay
check register to see clock disabled

Change-Id: Ia553e55ffb358415067000d2d2d2744322d1c4db
Signed-off-by: Akshu Agrawal 
---
M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl
1 file changed, 10 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/25263/1

diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl
index ea58f89..2cd58e9 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl
@@ -20,4 +20,14 @@
    Name (_ADR, 1)
    Name (_HID, "AMD7219")
    Name (_CID, "AMD7219")
+
+       Method (_CRS, 0x0, NotSerialized) {
+               Name (RBUF, ResourceTemplate () {
+                       // Memory resource is for MISC FCH register set.
+                       // It is needed for enabling of clock.
+                       Memory32Fixed(ReadWrite, 0xFED80E00, 0xFF)
+               })
+
+               Return (RBUF)
+       }
 }