Furquan Shaikh (furquan@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18341
-gerrit
commit 7fae78bea6386728185e8b891962195c464f5f2a Author: Furquan Shaikh furquan@chromium.org Date: Sat Feb 11 11:06:19 2017 -0800
soc/intel/skylake: Add support for SPI device
Add a new PCI driver for SPI devices with supported PCI ids. Also, provide a translation table to convert struct device structure into SPI bus number.
BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully
Change-Id: If860eb819f2ce5ae5443f808b356af57f86c52be Signed-off-by: Furquan Shaikh furquan@chromium.org --- src/soc/intel/skylake/include/soc/pci_devs.h | 10 ++++++++ src/soc/intel/skylake/spi.c | 37 ++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+)
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index 974f1d8..a19a7c6 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -176,4 +176,14 @@ static inline int i2c_devfn_to_bus(unsigned devfn) return -1; }
+static inline int spi_devfn_to_bus(unsigned devfn) +{ + switch (devfn) { + case PCH_DEVFN_SPI: return 0; + case PCH_DEVFN_GSPI0: return 1; + case PCH_DEVFN_GSPI1: return 2; + } + return -1; +} + #endif diff --git a/src/soc/intel/skylake/spi.c b/src/soc/intel/skylake/spi.c index ddff4dc..ecdc833 100644 --- a/src/soc/intel/skylake/spi.c +++ b/src/soc/intel/skylake/spi.c @@ -15,6 +15,12 @@ */
#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <device/spi.h> +#include <soc/ramstage.h> #include <spi-generic.h>
/* SPI controller managing the flash-device SPI. */ @@ -61,3 +67,34 @@ const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { };
const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); + +#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__) + +static int spi_dev_to_bus(struct device *dev) +{ + return spi_devfn_to_bus(dev->path.pci.devfn); +} + +static struct spi_bus_operations spi_bus_ops = { + .dev_to_bus = &spi_dev_to_bus, +}; + +static struct device_operations spi_dev_ops = { + .read_resources = &pci_dev_read_resources, + .set_resources = &pci_dev_set_resources, + .enable_resources = &pci_dev_enable_resources, + .scan_bus = &scan_generic_bus, + .ops_pci = &soc_pci_ops, + .ops_spi_bus = &spi_bus_ops, +}; + +static const unsigned short pci_device_ids[] = { + 0x9d24, 0x9d29, 0x9d2a, 0 +}; + +static const struct pci_driver pch_spi __pci_driver = { + .ops = &spi_dev_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +}; +#endif