Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12464
-gerrit
commit 724d9f49037c5f882974ca6dbd7a2298c2f0dc6e Author: Stefan Reinauer stefan.reinauer@coreboot.org Date: Wed Nov 18 15:26:07 2015 -0800
Don't include files from blobs directory
coreboot's binary policy forbids to store include files required to build the host binaries in the blobs directory. Hence remove the infrastructure to do so.
Change-Id: I66d57f84cbc392bbfc1f951d13424742d2cff978 Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org --- src/drivers/intel/fsp1_1/Makefile.inc | 2 -- src/drivers/intel/fsp1_1/include/fsp/soc_binding.h | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc index a296b53..f101cc4 100644 --- a/src/drivers/intel/fsp1_1/Makefile.inc +++ b/src/drivers/intel/fsp1_1/Makefile.inc @@ -36,8 +36,6 @@ ramstage-y += stage_cache.c ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include -# Where FspUpdVpd.h can be picked up from. -CPPFLAGS_common += -I$(CONFIG_FSP_INCLUDE_PATH)
cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_1/cache_as_ram.inc
diff --git a/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h b/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h index 04b01e9..affb43f 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h +++ b/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h @@ -27,7 +27,7 @@ #pragma pack(push)
/* - * This file is found by way of the Kconfig FSP_INCLUDE_PATH option. It is + * This file is found in the soc / chipset directory. It is * a per implementation specific header. i.e. different FSP implementations * for different chipsets. */