[coreboot-gerrit] Change in coreboot[master]: mb/google/kohaku: Update DPTF parameters

[shkim (Code Review)]

Hello Seunghwan Kim,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/34397

to review the following change.

Change subject: mb/google/kohaku: Update DPTF parameters
......................................................................

mb/google/kohaku: Update DPTF parameters

Apply initial DPTF parameters for kohaku.
The main perpose of this change is adjusting PL1, and we need further fine tuning later.

BUG=b:1704071
BRANCH=none
TEST=build

Change-Id: I8a87ff88e8e14ada473f9da59c15cdc779cbb108
Signed-off-by: Seunghwan Kim 
---
M src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl
1 file changed, 54 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/34397/1

diff --git a/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl
index f1f0943..0db8bea 100644
--- a/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl
@@ -13,4 +13,57 @@
  * GNU General Public License for more details.
  */

-#include <baseboard/acpi/dptf.asl>
+#define DPTF_CPU_PASSIVE	95
+#define DPTF_CPU_CRITICAL	105
+
+#define DPTF_TSR0_SENSOR_ID	0
+#define DPTF_TSR0_SENSOR_NAME	"Thermal Sensor 1"
+#define DPTF_TSR0_PASSIVE	65
+#define DPTF_TSR0_CRITICAL	75
+
+#define DPTF_TSR1_SENSOR_ID	1
+#define DPTF_TSR1_SENSOR_NAME	"Thermal Sensor 2"
+#define DPTF_TSR1_PASSIVE	65
+#define DPTF_TSR1_CRITICAL	75
+
+#define DPTF_ENABLE_CHARGER
+
+/* Charger performance states, board-specific values from charger and EC */
+Name (CHPS, Package () {
+	Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 },	/* 1.7A (MAX) */
+	Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 },	/* 1.5A */
+	Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 },	/* 1.0A */
+	Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 },	/* 0.5A */
+})
+
+Name (DTRT, Package () {
+	/* CPU Throttle Effect on CPU */
+	Package () { _SB.PCI0.TCPU, _SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 },
+
+	/* CPU Throttle Effect on Ambient (TSR0) */
+	Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 },
+
+	/* Charger Throttle Effect on Charger (TSR1) */
+	Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR1, 100, 60, 0, 0, 0, 0 },
+})
+
+Name (MPPC, Package ()
+{
+	0x2,		/* Revision */
+	Package () {	/* Power Limit 1 */
+		0,	/* PowerLimitIndex, 0 for Power Limit 1 */
+		5000,	/* PowerLimitMinimum */
+		8000,	/* PowerLimitMaximum */
+		28000,	/* TimeWindowMinimum */
+		32000,	/* TimeWindowMaximum */
+		200	/* StepSize */
+	},
+	Package () {	/* Power Limit 2 */
+		1,	/* PowerLimitIndex, 1 for Power Limit 2 */
+		51000,	/* PowerLimitMinimum */
+		51000,	/* PowerLimitMaximum */
+		28000,	/* TimeWindowMinimum */
+		32000,	/* TimeWindowMaximum */
+		1000	/* StepSize */
+	}
+})