[coreboot-gerrit] [M] Change in coreboot[main]: soc/intel: Add Wildcat Lake CPU and PCIE device IDs

[Appukuttan V K (Code Review)]

Attention is currently required from: Avi Uday, Intel coreboot Reviewers, Nick Vaccaro, Sowmya Aralguppe, Usha P, Varun Upadhyay.

Appukuttan V K has posted comments on this change by Appukuttan V K. ( https://review.coreboot.org/c/coreboot/+/87262?usp=email )

Change subject: soc/intel: Add Wildcat Lake CPU and PCIE device IDs
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Patch Set 9:

(2 comments)

File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/87262/comment/1071b025_195d1c66?usp... :
PS8, Line 4804:
> I see that some devices like these ones have not been added to the corresponding pci_device_ids[]. […]

Thankyou. Removed other CSE function device IDs, we are using only function 0.

File src/soc/intel/common/block/uart/uart.c:

https://review.coreboot.org/c/coreboot/+/87262/comment/4946bfbf_39310102?usp... :
PS8, Line 362: static const unsigned short pci_device_ids[] = {
> Should the UART devices not be added here too?

Done. Missed to add this earlier.