HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40225 )
Change subject: sb/{bd82x6x,ibexpeak,lynxpoint}/early_smbus: Use macro ......................................................................
sb/{bd82x6x,ibexpeak,lynxpoint}/early_smbus: Use macro
Change-Id: If57d785b92f0f09d9def90b8ac87833321e3cfcf Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/bd82x6x/early_smbus.c M src/southbridge/intel/ibexpeak/early_smbus.c M src/southbridge/intel/lynxpoint/early_smbus.c 3 files changed, 6 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/40225/1
diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c index f3151af..0275078 100644 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ b/src/southbridge/intel/bd82x6x/early_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
+#include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/smbus_host.h> @@ -17,7 +18,7 @@ pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
/* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, 0x0) != 0x8086) + if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) return -1;
/* Set SMBus I/O base. */ diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c index 0c99a22..b87c872 100644 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ b/src/southbridge/intel/ibexpeak/early_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
+#include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/smbus_host.h> @@ -17,7 +18,7 @@ pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
/* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, 0x0) != 0x8086) + if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) return -1;
/* Set SMBus I/O base. */ diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c index f3151af..0275078 100644 --- a/src/southbridge/intel/lynxpoint/early_smbus.c +++ b/src/southbridge/intel/lynxpoint/early_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
+#include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/smbus_host.h> @@ -17,7 +18,7 @@ pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
/* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, 0x0) != 0x8086) + if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) return -1;
/* Set SMBus I/O base. */