[coreboot-gerrit] Change in coreboot[master]: lib/spd: Change log prefix for ddr4 params

[Eric Lai (Code Review)]

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Reka Norman, Ivy Jian, Julius Werner.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63774 )

Change subject: lib/spd: Change log prefix for ddr4 params
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Patch Set 1:

(1 comment)

Patchset:

PS1:
> I agree with Tim, I'm not very familiar with this matter but it looks like you're taking the wrong a […]

I must admit I wasn't think this properly in CB:39366 , I don't know it will cause trouble back then. Let me explain the thoughts of this section. Back to 2020 when I refactor this code, we don't have DDR5/LPDDR5 SPD spec and still now. I don't use die and ASSERT and trying to use DDR4 parameter for the future generation memory. Because if it doesn't work, the MRC training will ASSERT or die. So I don't have to use die or ASSERT here. Thus, I think the warning level is legit here. Can you guys accept my explanation?