[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/tigerlake/Kconfig: Change PCIEXBAR location

[Frans Hendriks (Code Review)]

Attention is currently required from: Nico Huber, Sean Rhodes, Tim Wawrzynczak, Angel Pons, Felix Held.

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66908 )

Change subject: soc/intel/tigerlake/Kconfig: Change PCIEXBAR location
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Patch Set 2:

(1 comment)

Patchset:

PS2:
> It's about an SR-IOV extended capability and resources. coreboot doesn't touch
> those and whatever Linux does with it or assumes about it seems wrong. It was
> still unclear if a vanilla kernel shows the same problem (his tests were with
> an Ubuntu one).

Imo Linux does nothing wrong. coreboot reserved same area as fixed mmio and also assigning this area to PCI.
> What is most confusing is that Linux only complains in case of the ECAM/MMCONF
> resource and nothing else.

Which other areas do you means the addresses in the fixed mmio table are located above 0xf0000000, so non conflicting with the PCI