Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44823 )
Change subject: soc/intel/common: Support CSE FW update with compressed blobs ......................................................................
soc/intel/common: Support CSE FW update with compressed blobs
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I6cfddc53c33ac7d958696dab204c4e505f2febb4 --- M src/soc/intel/common/block/cse/Kconfig M src/soc/intel/common/block/cse/cse_lite.c 2 files changed, 44 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/44823/1
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index 1cb7d35..f4a8356 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -37,3 +37,15 @@ default "" help Intel CSE CBFS RW blob path and file name + +config SOC_INTEL_CSE_RW_VER_FILE + string "Intel CSE CBFS RW path and filename" + default "" + help + Intel CSE CBFS RW blob path and file name + +config SOC_INTEL_CSE_RW_VER_CBFS_NAME + string "CBFS entry name for CSE RW blob" + default "me_rw.ver" + help + CBFS entry name for Intel CSE CBFS RW blob diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index edb08da..fa8487c 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -24,6 +24,12 @@ /* CSE RW boot partition signature size */ #define CSE_RW_SIGN_SIZE sizeof(uint32_t)
+#if CONFIG(SOC_INTEL_TIGERLAKE) +#define CSE_RW_BLOB_SIZE (4 * MiB) +#else +#define CSE_RW_BLOB_SIZE (2 * MiB) +#endif + /* * CSE Firmware supports 3 boot partitions. For CSE Lite SKU, only 2 boot partitions are * used and 3rd boot partition is set to BP_STATUS_PARTITION_NOT_PRESENT. @@ -422,7 +428,7 @@ { struct cbfsf file_desc;
- if (cbfs_boot_locate(&file_desc, CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME, NULL) < 0) + if (cbfs_boot_locate(&file_desc, CONFIG_SOC_INTEL_CSE_RW_VER_CBFS_NAME, NULL) < 0) return false;
cbfs_file_data(source_rdev, &file_desc); @@ -617,42 +623,52 @@ }
static bool cse_write_rw_region(const struct region_device *target_rdev, - const struct region_device *source_rdev) + const uint8_t *cse_cbfs_rw, uint32_t cse_cbfs_rw_sz) { - void *cse_cbfs_rw = rdev_mmap(source_rdev, CSE_RW_VERSION_SZ, - region_device_sz(source_rdev) - CSE_RW_VERSION_SZ);
/* Points to CSE CBFS RW image after boot partition signature */ uint8_t *cse_cbfs_rw_wo_sign = (uint8_t *)cse_cbfs_rw + CSE_RW_SIGN_SIZE;
/* Size of CSE CBFS RW image without boot partition signature */ - uint32_t cse_cbfs_rw_wo_sign_sz = region_device_sz(source_rdev) - - (CSE_RW_VERSION_SZ + CSE_RW_SIGN_SIZE); + uint32_t cse_cbfs_rw_wo_sign_sz = cse_cbfs_rw_sz - CSE_RW_SIGN_SIZE;
/* Update except CSE RW signature */ if (!cse_copy_rw(target_rdev, cse_cbfs_rw_wo_sign, CSE_RW_SIGN_SIZE, cse_cbfs_rw_wo_sign_sz)) - goto exit_rw_update; + return false;
/* Update CSE RW signature to indicate update is complete */ if (!cse_copy_rw(target_rdev, (void *)cse_cbfs_rw, 0, CSE_RW_SIGN_SIZE)) - goto exit_rw_update; + return false;
- rdev_munmap(source_rdev, cse_cbfs_rw_wo_sign); return true; +}
-exit_rw_update: - rdev_munmap(source_rdev, cse_cbfs_rw_wo_sign); - return false; +static size_t cse_get_cbfs_rw(uint8_t *cbfs_rw_blob, size_t buff_size) +{ + const char *rw_blob = CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME; + + return cbfs_boot_load_file(rw_blob, cbfs_rw_blob, buff_size, CBFS_TYPE_RAW); }
static bool cse_update_rw(const struct cse_bp_info *cse_bp_info, - const struct region_device *source_rdev, struct region_device *target_rdev) + const struct region_device *target_rdev) { + static uint8_t cse_cbfs_rw[CSE_RW_BLOB_SIZE]; + size_t cse_cbfs_rw_sz; + + + cse_cbfs_rw_sz = cse_get_cbfs_rw(cse_cbfs_rw, CSE_RW_BLOB_SIZE); + + if (cse_cbfs_rw_sz == 0) + return false; + + printk(BIOS_INFO, "cse_lite: blob size= %lu\n", cse_cbfs_rw_sz); + if (!cse_erase_rw_region(target_rdev)) return false;
- if (!cse_write_rw_region(target_rdev, source_rdev)) + if (!cse_write_rw_region(target_rdev, cse_cbfs_rw, cse_cbfs_rw_sz)) return false;
printk(BIOS_INFO, "cse_lite: CSE RW Update Successful\n"); @@ -682,10 +698,11 @@ static uint8_t cse_trigger_fw_update(const struct cse_bp_info *cse_bp_info, const struct region_device *source_rdev, struct region_device *target_rdev) { + if (!cse_prep_for_rw_update(cse_bp_info, source_rdev)) return CSE_LITE_SKU_COMMUNICATION_ERROR;
- if (!cse_update_rw(cse_bp_info, source_rdev, target_rdev)) + if (!cse_update_rw(cse_bp_info, target_rdev)) return CSE_LITE_SKU_FW_UPDATE_ERROR;
return 0;