[coreboot-gerrit] Change in coreboot[master]: HACK HACK soc: qcom: Update the GPIO macro for consumers HACK HACK

[Ravi kumar (Code Review)]

Attention is currently required from: Taniya Das.
Hello Taniya Das,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/55080

to review the following change.

Change subject: HACK HACK soc: qcom: Update the GPIO macro for consumers HACK HACK
......................................................................

HACK HACK soc: qcom: Update the GPIO macro for consumers HACK HACK

As we are proceeding to use the common gpio driver across qcom chipsets,
the gpio macros used across drivers need to be renamed as per the latest
gpio changes.

Change-Id: I97656a7399c018f8508525ae7cbcffe7fad956e2
Signed-off-by: Taniya Das 
---
M src/soc/qualcomm/sc7180/qspi.c
M src/soc/qualcomm/sc7180/qupv3_i2c.c
M src/soc/qualcomm/sc7280/pcie_host.c
M src/soc/qualcomm/sc7280/qspi.c
M src/soc/qualcomm/sc7280/qupv3_i2c.c
5 files changed, 11 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/55080/1

diff --git a/src/soc/qualcomm/sc7180/qspi.c b/src/soc/qualcomm/sc7180/qspi.c
index c1e9779..825e298 100644
--- a/src/soc/qualcomm/sc7180/qspi.c
+++ b/src/soc/qualcomm/sc7180/qspi.c
@@ -146,13 +146,13 @@
    gpio_output(GPIO(68), 1);

gpio_configure(GPIO(64), GPIO64_FUNC_QSPI_DATA_0,
-		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE);
+		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT);

gpio_configure(GPIO(65), GPIO65_FUNC_QSPI_DATA_1,
-		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE);
+		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT);

gpio_configure(GPIO(63), GPIO63_FUNC_QSPI_CLK,
-		GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT_ENABLE);
+		GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT);
 }

static void queue_bounce_data(uint8_t *data, uint32_t data_bytes,
diff --git a/src/soc/qualcomm/sc7180/qupv3_i2c.c b/src/soc/qualcomm/sc7180/qupv3_i2c.c
index c9adba4..5dc4d31 100644
--- a/src/soc/qualcomm/sc7180/qupv3_i2c.c
+++ b/src/soc/qualcomm/sc7180/qupv3_i2c.c
@@ -92,9 +92,9 @@

/* GPIO Configuration */
    gpio_configure(qup[bus].pin[0], qup[bus].func[0], GPIO_PULL_UP,
-				GPIO_2MA, GPIO_OUTPUT_ENABLE);
+				GPIO_2MA, GPIO_OUTPUT);
    gpio_configure(qup[bus].pin[1], qup[bus].func[1], GPIO_PULL_UP,
-				GPIO_2MA, GPIO_OUTPUT_ENABLE);
+				GPIO_2MA, GPIO_OUTPUT);

/* Select and setup FIFO mode */
    write32(&regs->geni_m_irq_clear, 0xFFFFFFFF);
diff --git a/src/soc/qualcomm/sc7280/pcie_host.c b/src/soc/qualcomm/sc7280/pcie_host.c
index 81b37f2..b2b227c 100644
--- a/src/soc/qualcomm/sc7280/pcie_host.c
+++ b/src/soc/qualcomm/sc7280/pcie_host.c
@@ -447,7 +447,7 @@
 static void configure_pcie_gpios(gpio_t perst_gpio)
 {
    gpio_configure(perst_gpio, 0, GPIO_NO_PULL,
-			GPIO_16MA, GPIO_OUTPUT_ENABLE);
+			GPIO_16MA, GPIO_OUTPUT);

printk(BIOS_INFO, "pcie ep PERST GPIO configured\n");
 }
diff --git a/src/soc/qualcomm/sc7280/qspi.c b/src/soc/qualcomm/sc7280/qspi.c
index a6837bc..4941425 100644
--- a/src/soc/qualcomm/sc7280/qspi.c
+++ b/src/soc/qualcomm/sc7280/qspi.c
@@ -146,13 +146,13 @@
    gpio_output(GPIO(15), 1);

gpio_configure(GPIO(12), GPIO12_FUNC_QSPI_DATA_0,
-		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE);
+		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT);

gpio_configure(GPIO(13), GPIO13_FUNC_QSPI_DATA_1,
-		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE);
+		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT);

gpio_configure(GPIO(14), GPIO14_FUNC_QSPI_CLK,
-		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE);
+		GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT);
 }

static void queue_bounce_data(uint8_t *data, uint32_t data_bytes,
diff --git a/src/soc/qualcomm/sc7280/qupv3_i2c.c b/src/soc/qualcomm/sc7280/qupv3_i2c.c
index c9adba4..5dc4d31 100644
--- a/src/soc/qualcomm/sc7280/qupv3_i2c.c
+++ b/src/soc/qualcomm/sc7280/qupv3_i2c.c
@@ -92,9 +92,9 @@

/* GPIO Configuration */
    gpio_configure(qup[bus].pin[0], qup[bus].func[0], GPIO_PULL_UP,
-				GPIO_2MA, GPIO_OUTPUT_ENABLE);
+				GPIO_2MA, GPIO_OUTPUT);
    gpio_configure(qup[bus].pin[1], qup[bus].func[1], GPIO_PULL_UP,
-				GPIO_2MA, GPIO_OUTPUT_ENABLE);
+				GPIO_2MA, GPIO_OUTPUT);

/* Select and setup FIFO mode */
    write32(&regs->geni_m_irq_clear, 0xFFFFFFFF);