Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38548 )
Change subject: Add Intel SkyLake Scalable Processor support ......................................................................
Patch Set 5:
(6 comments)
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/ch... File src/soc/intel/skylake_sp/chip.c:
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/ch... PS5, Line 171: (res->flags & IORESOURCE_PREFETCH) ? \
Avoid unnecessary line continuations
Done
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/ch... PS5, Line 381: ((bridge->flags & (IORESOURCE_IO | IORESOURCE_MEM |
line over 96 characters
Done
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/ch... PS5, Line 382: IORESOURCE_PREFETCH | IORESOURCE_PCI64)) ==
line over 96 characters
Done
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/ch... PS5, Line 549: link->secondary, stack->BusBase, stack->BusLimit, stack->PciResourceIoBase,
line over 96 characters
Done
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/in... File src/soc/intel/skylake_sp/include/soc/hob_memmap.h:
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/in... PS5, Line 82: BOOLEAN newDimm; // 0 - DIMM is not new to the system for this boot 1 - DIMM is new to the system for this boot (AEP DIMM only)
line over 96 characters
Done
https://review.coreboot.org/c/coreboot/+/38548/5/src/soc/intel/skylake_sp/in... PS5, Line 108: UINT8 EnergyType; // 0: 12V aux power; 1: dedicated backup energy source; 2: no backup energy source
line over 96 characters
Done