[coreboot-gerrit] Change in coreboot[master]: mb/roda/rk886ex: Don't rewrite pnp_{enter,exit}_conf_state function

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37686 )

Change subject: mb/roda/rk886ex: Don't rewrite pnp_{enter,exit}_conf_state function
......................................................................

mb/roda/rk886ex: Don't rewrite pnp_{enter,exit}_conf_state function

Change-Id: Ie9918e5114bb880e37680a85eab2bd224b0b082c
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37686
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/mainboard/roda/rk886ex/early_init.c
1 file changed, 4 insertions(+), 13 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/mainboard/roda/rk886ex/early_init.c b/src/mainboard/roda/rk886ex/early_init.c
index f3e24e0..6f0a12c 100644
--- a/src/mainboard/roda/rk886ex/early_init.c
+++ b/src/mainboard/roda/rk886ex/early_init.c
@@ -24,6 +24,8 @@
 #include <pc80/mc146818rtc.h>
 #include <northbridge/intel/i945/i945.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>
+#include <superio/smsc/lpc47n227/lpc47n227.h>
+
 #include "option_table.h"

/* Override the default lpc decode ranges */
@@ -43,17 +45,6 @@
  * the two. Also set up the GPIOs from the beginning. This is the "no schematic
  * but safe anyways" method.
  */
-static inline void pnp_enter_ext_func_mode(pnp_devfn_t dev)
-{
-	unsigned int port = dev >> 8;
-	outb(0x55, port);
-}
-
-static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
-{
-	unsigned int port = dev >> 8;
-	outb(0xaa, port);
-}

void bootblock_mainboard_early_init(void)
 {
@@ -61,7 +52,7 @@

dev = PNP_DEV(0x2e, 0x00);

-	pnp_enter_ext_func_mode(dev);
+	pnp_enter_conf_state(dev);
    pnp_write_config(dev, 0x01, 0x94); /* Extended Parport modes */
    pnp_write_config(dev, 0x02, 0x88); /* UART power on */
    pnp_write_config(dev, 0x03, 0x72); /* Floppy */
@@ -87,7 +78,7 @@
    pnp_write_config(dev, 0x38, 0x00); /* GPIO4 POL */
    pnp_write_config(dev, 0x39, 0x80); /* GPIO4 POL */

-	pnp_exit_ext_func_mode(dev);
+	pnp_exit_conf_state(dev);
 }

void mainboard_late_rcba_config(void)