Patrick Rudolph (siro@das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10889
-gerrit
commit 05fa277450fe8f1d8e2d044a7e6182d4b72292f5 Author: Patrick Rudolph siro@das-labor.org Date: Sun Jul 12 12:17:21 2015 +0200
intel raminit: fix timB high adjust calculation
Issue observed: Any memory DIMM placed in channel0 slots stops at "c320c discovery failed". The same memory DIMM works when placed in channel1 slots.
Test system: * Intel Pentium CPU G2130 * Gigabyte GA-B75M-D3H * DIMMs: * elixir 1GB 1Rx8 PC3-10600U M2Y1G64CB88A5N * crucial 2GB 256Mx64 CT2566aBA160BJ * corsair 8GB CMZ16GX3M2A1866C9
Problem description: In case of good timmings (all bits are set) an offset of 3*64 was applied. The following test (c320c discovery) failed only on those byte-lanes.
Problem solution: Don't modify timB in case of good timings measured.
Final testing result: The system boots with every DIMM placed in channel 0 slots.
Change-Id: Iea426ea4470640ce254f16e958a395644ff1a55c Signed-off-by: Patrick Rudolph siro@das-labor.org --- src/northbridge/intel/sandybridge/raminit_native.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index 02825f8..982a03d 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -2283,6 +2283,11 @@ static void discover_timB(ramctr_timing * ctrl, int channel, int slotrank) static int get_timB_high_adjust(u64 val) { int i; + + /* good */ + if (val == 0xffffffffffffffffLL) + return 0; + if (val >= 0xfffffffffffff000LL) return 3; if (val >= 0xfffffffffff00000LL)