Hello Patrick Rudolph, Aaron Durbin, Rajat Jain, Patrick Rudolph, Duncan Laurie, Shelley Chen, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Paul Fagerburg, Tim Wawrzynczak, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33129
to look at the new patch set (#11).
Change subject: soc/intel/common/pch: Enable PCH Thermal Sensor for threshold configuration ......................................................................
soc/intel/common/pch: Enable PCH Thermal Sensor for threshold configuration
PMC logic shuts down the PCH thermal sensor when CPU is in a C-state and DTS Temp <= Low Temp Threshold (LTT) in case of Dynamic Thermal shutdown when S0ix is enabled.
BUG=None BRANCH=None TEST=Verified Thermal Device (B0: D18: F0) TSPM offset 0x1c [LTT (8:0)] value is 0xFE.
Change-Id: Ibd1e669fcbfe8dc6e6e5556aa5b1373ed19c3685 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/soc/intel/common/block/include/intelblocks/chip.h M src/soc/intel/common/pch/Kconfig A src/soc/intel/common/pch/include/thermal.h A src/soc/intel/common/pch/thermal/Kconfig A src/soc/intel/common/pch/thermal/Makefile.inc A src/soc/intel/common/pch/thermal/thermal.c 6 files changed, 132 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/33129/11