[coreboot-gerrit] [S] Change in coreboot[main]: mb/amd/birman/devicetree_phoenix_opensil: add static DDI configuration

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82581?usp=email )

Change subject: mb/amd/birman/devicetree_phoenix_opensil: add static DDI configuration
......................................................................

mb/amd/birman/devicetree_phoenix_opensil: add static DDI configuration

Add a static DDI port configuration to the devicetree used in the
Phoenix with openSIL case. The configuration is taken from the
birman_ddi_descriptors array in port_descriptor_phoenix.c.

Signed-off-by: Felix Held 
Change-Id: I7b85b04114591f3e9da183019c98ca2cb08e59da
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82581
Reviewed-by: Matt DeVillier 
Reviewed-by: Varshit Pandya 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
1 file changed, 26 insertions(+), 0 deletions(-)

Approvals:
  Matt DeVillier: Looks good to me, approved
  Varshit Pandya: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb b/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
index bca4559..055d9e1 100644
--- a/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
+++ b/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
@@ -41,6 +41,32 @@

register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works

+	register "ddi[0]" = "{
+		.connector_type = DDI_EDP,
+		.aux_index = 0,
+		.hdp_index = 0,
+	}"
+	register "ddi[1]" = "{
+		.connector_type = DDI_HDMI,
+		.aux_index = 1,
+		.hdp_index = 1,
+	}"
+	register "ddi[2]" = "{
+		.connector_type = DDI_DP_W_TYPEC,
+		.aux_index = 2,
+		.hdp_index = 2,
+	}"
+	register "ddi[3]" = "{
+		.connector_type = DDI_DP_W_TYPEC,
+		.aux_index = 3,
+		.hdp_index = 3,
+	}"
+	register "ddi[4]" = "{
+		.connector_type = DDI_DP_W_TYPEC,
+		.aux_index = 4,
+		.hdp_index = 4,
+	}"
+
    device domain 0 on
    	device ref iommu on end
    	chip vendorcode/amd/opensil/chip/mpio