Attention is currently required from: Angel Pons, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49749 )
Change subject: nb/intel/haswell: Use common {DMI,EP,MCH}BAR accessors ......................................................................
Patch Set 6: Code-Review+1
(1 comment)
File src/northbridge/intel/haswell/haswell.h:
https://review.coreboot.org/c/coreboot/+/49749/comment/51719819_60f3f0ad PS6, Line 64: #define EPBAR64(x) (*((volatile u64 *)(CONFIG_FIXED_EPBAR_MMIO_BASE + (x)))) This won't compile for 64 bit:
In file included from src/northbridge/intel/haswell/haswell.h:37, from src/northbridge/intel/haswell/raminit.c:21: src/northbridge/intel/haswell/raminit.c: In function 'report_memory_config': src/northbridge/intel/common/fixed_bars.h:14:24: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 14 | #define MCHBAR32(x) (*((volatile u32 *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + (x)))) | ^ src/northbridge/intel/haswell/raminit.c:77:23: note: in expansion of macro 'MCHBAR32' 77 | const u32 ch_conf = MCHBAR32(MAD_DIMM(i)); | ^~~~~~~~
As the EPBAR base fits a 32-bit unsigned integer, it will be represented by one and has to be casted to `uintptr_t` first, to match the pointer width.