[coreboot-gerrit] Change in coreboot[master]: soc/intel/coffeelake: Enable support up to 24 PCIE Root Ports

[Kin Wai Ng (Code Review)]

Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi,

I'd like you to do a code review. Please visit

https://review.coreboot.org/25239

to review the following change.

Change subject: soc/intel/coffeelake: Enable support up to 24 PCIE Root Ports
......................................................................

soc/intel/coffeelake: Enable support up to 24 PCIE Root Ports

Change-Id: Ie822c9b8da328045766be162275f1c7ffa2bf5b2
Signed-off-by: Ng Kin Wai 
---
M src/soc/intel/coffeelake/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/25239/1

diff --git a/src/soc/intel/coffeelake/Kconfig b/src/soc/intel/coffeelake/Kconfig
index 72d7501..ccf699d 100755
--- a/src/soc/intel/coffeelake/Kconfig
+++ b/src/soc/intel/coffeelake/Kconfig
@@ -164,7 +164,7 @@

config MAX_ROOT_PORTS
    int
-	default 16
+	default 24

config SMM_TSEG_SIZE
    hex