[coreboot-gerrit] Change in coreboot[master]: soc/xeon_sp/skx: Define MSR PPIN related registers

[Johnny Lin (Code Review)]

Hello build bot (Jenkins), Andrey Petrov, Frans Hendriks, Maxim Polyakov, Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Patrick Rudolph, HAOUAS Elyes,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40523

to look at the new patch set (#12).

Change subject: soc/xeon_sp/skx: Define MSR PPIN related registers
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soc/xeon_sp/skx: Define MSR PPIN related registers

These changes are in accordance with the documentation:
[*] page 208-209
    Intel(R) 64 and IA-32 Architectures, Software Developer’s Manual,
    Volume 4: Model-Specific Registers. May 2019.
    Order Number: 335592-070US

Tested on OCP Tioga Pass.

Signed-off-by: Johnny Lin 
Change-Id: I5e1de8bcb651fb8ae8b106db1978235b0dd84c47
---
M src/soc/intel/xeon_sp/skx/include/soc/msr.h
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/40523/12