Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47991 )
Change subject: soc/intel/common/fast_spi: Add support for configuring MTRRs ......................................................................
Patch Set 4: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/47991/4/src/soc/intel/common/block/... File src/soc/intel/common/block/include/intelblocks/fast_spi.h:
https://review.coreboot.org/c/coreboot/+/47991/4/src/soc/intel/common/block/... PS4, Line 86: /* : * Postcar cache for extended BIOS region : */ Single line comment: /* ... */
Also probably say: Add MTRR for extended BIOS region (if required) to postcar frame.
https://review.coreboot.org/c/coreboot/+/47991/4/src/soc/intel/common/block/... File src/soc/intel/common/block/systemagent/memmap.c:
https://review.coreboot.org/c/coreboot/+/47991/4/src/soc/intel/common/block/... PS4, Line 76: thee nit: the