[coreboot-gerrit] Change in coreboot[master]: soc/intel/{cnl,icl}: Avoid static 8254 clock gating on S3 resume

[Subrata Banik (Code Review)]

Hello Patrick Rudolph, Angel Pons, Duncan Laurie, build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39110

to look at the new patch set (#2).

Change subject: soc/intel/{cnl,icl}: Avoid static 8254 clock gating on S3 resume
......................................................................

soc/intel/{cnl,icl}: Avoid static 8254 clock gating on S3 resume

This patch makes all legacy 8254 FSP UPDs (Enable8254ClockGating and
Enable8254ClockGatingOnS3) depend on CONFIG_USE_LEGACY_8254_TIMER to
avoid discrepancy between S0 and S3 resume flow.

TEST=Able to boot to TianoCore without any hangs and errors, also
verified S3 resume path doesn't clock gate 8254 timer using FSP-S UPD.

Change-Id: Id6fe74a51537abbb9ff48db925e37a64e5b21f78
Signed-off-by: Subrata Banik 
---
M src/soc/intel/cannonlake/fsp_params.c
M src/soc/intel/icelake/fsp_params.c
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/39110/2