Marc Jones has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45969 )
Change subject: soc/intel/xeon_sp: Add common chip.h ......................................................................
soc/intel/xeon_sp: Add common chip.h
Add a common chip.h which includes the configured Xeon specific header file. Rename the Xeon specific header files. Common files should call chip.h while Xeon silicon specific files call their named header file. This should allow addition of new Xeon silicon.
This change prepares for additional common code changes.
Change-Id: I1c5e3dec3ee24328b1e987fdae856e9e77fe5499 Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/mainboard/ocp/deltalake/romstage.c A src/soc/intel/xeon_sp/chip.h M src/soc/intel/xeon_sp/cpx/acpi.c M src/soc/intel/xeon_sp/cpx/cpu.c M src/soc/intel/xeon_sp/cpx/romstage.c M src/soc/intel/xeon_sp/cpx/soc_acpi.c M src/soc/intel/xeon_sp/lpc.c M src/soc/intel/xeon_sp/skx/acpi.c M src/soc/intel/xeon_sp/skx/cpu.c M src/soc/intel/xeon_sp/skx/romstage.c M src/soc/intel/xeon_sp/skx/soc_acpi.c 11 files changed, 29 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/45969/1
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c index 71a26c8..a711601 100644 --- a/src/mainboard/ocp/deltalake/romstage.c +++ b/src/mainboard/ocp/deltalake/romstage.c @@ -8,7 +8,7 @@ #include <soc/romstage.h> #include <string.h>
-#include "chip.h" +#include <soc/intel/xeon_sp/chip.h> #include "ipmi.h" #include "vpd.h"
diff --git a/src/soc/intel/xeon_sp/chip.h b/src/soc/intel/xeon_sp/chip.h new file mode 100644 index 0000000..77d15643 --- /dev/null +++ b/src/soc/intel/xeon_sp/chip.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _SOC_COMMON_CHIP_H_ +#define _SOC_COMMON_CHIP_H_ + +/* Common chip.h includes the approprate soc chip.h. */ + +#if (CONFIG(SOC_INTEL_SKYLAKE_SP)) + #include "skx/skx.h" +#endif + +#if (CONFIG(SOC_INTEL_COOPERLAKE_SP)) + #include "cpx/cpx.h" +#endif + +#endif diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c index 93cd8ed..ea61c58 100644 --- a/src/soc/intel/xeon_sp/cpx/acpi.c +++ b/src/soc/intel/xeon_sp/cpx/acpi.c @@ -23,7 +23,7 @@ #include <soc/pm.h> #include <soc/soc_util.h>
-#include "chip.h" +#include "cpx.h"
static int acpi_sci_irq(void) { diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c index eb8c0eb..25ad74b 100644 --- a/src/soc/intel/xeon_sp/cpx/cpu.c +++ b/src/soc/intel/xeon_sp/cpx/cpu.c @@ -15,7 +15,8 @@ #include <soc/cpu.h> #include <soc/msr.h> #include <soc/soc_util.h> -#include "chip.h" + +#include "cpx.h"
static const void *microcode_patch;
diff --git a/src/soc/intel/xeon_sp/cpx/romstage.c b/src/soc/intel/xeon_sp/cpx/romstage.c index a198c99..ee58313 100644 --- a/src/soc/intel/xeon_sp/cpx/romstage.c +++ b/src/soc/intel/xeon_sp/cpx/romstage.c @@ -4,7 +4,8 @@ #include <fsp/api.h> #include <soc/romstage.h> #include <soc/pci_devs.h> -#include "chip.h" + +#include "cpx.h"
void __weak mainboard_memory_init_params(FSPM_UPD *mupd) { diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c index 4850855..038d7ae 100644 --- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c @@ -17,7 +17,7 @@ #include <soc/pm.h> #include <soc/soc_util.h>
-#include "chip.h" +#include "cpx.h"
/* Check if the common/acpi weak function can be used */ unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/soc/intel/xeon_sp/lpc.c b/src/soc/intel/xeon_sp/lpc.c index 3169545..5edfa4b 100644 --- a/src/soc/intel/xeon_sp/lpc.c +++ b/src/soc/intel/xeon_sp/lpc.c @@ -7,7 +7,7 @@ #include <soc/iomap.h> #include <soc/pcr_ids.h>
-#include <chip.h> +#include "chip.h"
static const struct lpc_mmio_range xeon_lpc_fixed_mmio_ranges[] = { { 0, 0 } diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index cbafbdb..8b2f9a1 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -15,7 +15,7 @@ #include <soc/pm.h> #include <string.h>
-#include "chip.h" +#include "skx.h"
acpi_cstate_t *soc_get_cstate_map(size_t *entries) { diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c index ea9f531..3e7aeb3 100644 --- a/src/soc/intel/xeon_sp/skx/cpu.c +++ b/src/soc/intel/xeon_sp/skx/cpu.c @@ -10,7 +10,8 @@ #include <soc/cpu.h> #include <soc/soc_util.h> #include <assert.h> -#include "chip.h" + +#include "skx.h"
static const config_t *chip_config = NULL;
diff --git a/src/soc/intel/xeon_sp/skx/romstage.c b/src/soc/intel/xeon_sp/skx/romstage.c index a1c370d..93a6cd0 100644 --- a/src/soc/intel/xeon_sp/skx/romstage.c +++ b/src/soc/intel/xeon_sp/skx/romstage.c @@ -6,7 +6,7 @@ #include <soc/romstage.h> #include <soc/soc_util.h>
-#include "chip.h" +#include "skx.h"
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c index c116506..fedb83c 100644 --- a/src/soc/intel/xeon_sp/skx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c @@ -18,7 +18,7 @@ #include <soc/pm.h> #include <soc/soc_util.h>
-#include "chip.h" +#include "skx.h"
/* Check if the common/acpi weak function can be used */ unsigned long acpi_fill_mcfg(unsigned long current)