Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Sridhar Siricilla, Rizwan Qureshi, Subrata Banik, Balaji Manigandan, Aamir Bohra, Patrick Rudolph, V Sowmya, Nico Huber, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35402
to look at the new patch set (#73).
Change subject: soc/intel/common/block/cse: Add boot partition related APIs ......................................................................
soc/intel/common/block/cse: Add boot partition related APIs
In CSE Firmware Custom SKU, CSE region is logically divided into 2 boot partitions. These boot partitions are represented by BP1, BP2. Using the CSE Firmware Custom SKU, CSE can boot from either BP1 or BP2. The CSE Firmware Custom SKU layout appears as below: ------------- -------------------- --------------------- |CSE REGION | => | RO | RW | DATA | => | BP1 | BP2 | DATA | ------------- -------------------- ---------------------
In order to support CSE FW update to RW region, below APIs help coreboot to get info about the boot partitions, and allows coreboot to set CSE to boot from required boot partition (either BP1(RO) or BP2).
GET_BOOT_PARTITION_INFO - Provides info on available partitions in the CSE region. The API provides info on boot partitions like start/end offsets of a partition within CSE region, and their version and partition status.
SET_BOOT_PARTITION_INFO - Sets next boot partition to boot for CSE. With the HECI API, firmware can notify CSE to boot from BP1 or BP2 on next boot.
As system having CSE Firmware Custom SKU, boots from RO(BP1) after G3, so coreboot must set CSE to boot from RW(BP2) in normal mode and further, coreboot should ensure CSE to boot from RO(BP1) if system is in Recovery mode.
BUG=b:145809764 TEST=Verified on hatch
Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/cannonlake/me.c M src/soc/intel/common/block/cse/Kconfig M src/soc/intel/common/block/cse/Makefile.inc A src/soc/intel/common/block/cse/custom_bp.c M src/soc/intel/common/block/include/intelblocks/cse.h 5 files changed, 386 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/35402/73