[coreboot-gerrit] Change in coreboot[master]: mb/google/volteer/variants/eldrid: fine-tune USB2 Eye Diagram

[Nick Chen (Code Review)]

Nick Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45598 )

Change subject: mb/google/volteer/variants/eldrid: fine-tune USB2 Eye Diagram
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mb/google/volteer/variants/eldrid: fine-tune USB2 Eye Diagram

In order to pass DB type-C USB2 eye diagram, DB USB2 PHY register needs to
be overridde.

port#1
PortUsb20Enable=1
Usb2PhyPetxiset=7
Usb2PhyTxiset=7
Usb2PhyPredeemp=3
Usb2PhyPehalfbit=0

BUG=b:169105751
Signed-off-by: nick_xr_chen 
Change-Id: If076c644783fa2992ac062d6469f9c49e6d5ff24
---
M src/mainboard/google/volteer/variants/eldrid/overridetree.cb
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/45598/1

diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
index b04b1e7..46dfc5e 100644
--- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
@@ -48,6 +48,15 @@
    		},
    	},
    }"
+	#usb2 Eye Diagram
+	register "usb2_ports[4]" = "{
+		.enable = 1,
+		.tx_bias = 7,
+		.tx_emp_enable = 7,
+		.pre_emp_bias - 3,
+		.pre_emp_bit = 0,
+	}"
+
    device domain 0 on
    	device pci 04.0 off end
    	device pci 15.0 on