[coreboot-gerrit] Change in coreboot[master]: sec/intel/txt/ramstage.c: Do not init the heap on S3 resume

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Arthur Heymans,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46495

to look at the new patch set (#4).

Change subject: sec/intel/txt/ramstage.c: Do not init the heap on S3 resume
......................................................................

sec/intel/txt/ramstage.c: Do not init the heap on S3 resume

It causes problems on Haswell: SINIT detects that the heap tables differ
in size, and then issues a Class Code 9, Major Error Code 1 TXT reset.

Change-Id: I26f3d291abc7b2263e0b115e94426ac6ec8e5c48
Signed-off-by: Angel Pons 
---
M src/security/intel/txt/ramstage.c
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/46495/4