Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32701
Change subject: arch/cpu: Rename mp_get_apic_id() function ......................................................................
arch/cpu: Rename mp_get_apic_id() function
This patch renames mp_get_apic_id() to cpu_get_apic_id() in order access it outside CONFIG_PARALLEL_MP kconfig scope.
Also make below changes 1. Make sure add_cpu_map_entry() function saves default_apic_id before calling SMM relocation. 2. Use dev_find_path() to get cpu device path. 3. Remove redundent add_cpu_map_entry() call from BSP and AP. Move this function call into cpu_initialize()
Change-Id: I6a6c85df055bc0b5fc8c850cfa04d50859067088 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/arch/x86/cpu.c M src/cpu/x86/mp_init.c M src/include/cpu/cpu.h M src/include/cpu/x86/mp.h 4 files changed, 32 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/32701/1
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index 80d4d0d..f1b14d5 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -219,6 +219,30 @@ cpu->ops = driver ? driver->ops : NULL; }
+struct cpu_map { + struct device *dev; + /* Keep track of default apic ids for SMM. */ + int default_apic_id; +}; + +/* Keep track of APIC and device structure for each CPU. */ +static struct cpu_map cpus[CONFIG_MAX_CPUS]; + +static inline void add_cpu_map_entry(const struct cpu_info *info) +{ + cpus[info->index].dev = info->cpu; + cpus[info->index].default_apic_id = cpuid_ebx(1) >> 24; +} + +/* Returns APIC id for coreboot CPU number or < 0 on failure. */ +int cpu_get_apic_id(int logical_cpu) +{ + if (logical_cpu >= CONFIG_MAX_CPUS || logical_cpu < 0) + return -1; + + return cpus[logical_cpu].default_apic_id; +} + void cpu_initialize(unsigned int index) { /* Because we busy wait at the printk spinlock. @@ -231,6 +255,8 @@ struct cpuinfo_x86 c;
info = cpu_info(); + /* Track cpus in cpu_map structures. */ + add_cpu_map_entry(info);
printk(BIOS_INFO, "Initializing CPU #%d\n", index);
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 9d51b3e..28e50d0 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -135,21 +135,6 @@ static int global_num_aps; static struct mp_flight_plan mp_info;
-struct cpu_map { - struct device *dev; - /* Keep track of default apic ids for SMM. */ - int default_apic_id; -}; - -/* Keep track of APIC and device structure for each CPU. */ -static struct cpu_map cpus[CONFIG_MAX_CPUS]; - -static inline void add_cpu_map_entry(const struct cpu_info *info) -{ - cpus[info->index].dev = info->cpu; - cpus[info->index].default_apic_id = cpuid_ebx(1) >> 24; -} - static inline void barrier_wait(atomic_t *b) { while (atomic_read(b) == 0) @@ -212,9 +197,8 @@
info = cpu_info(); info->index = cpu; - info->cpu = cpus[cpu].dev; + info->cpu = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
- add_cpu_map_entry(info); thread_init_cpu_info_non_bsp(info);
/* Fix up APIC id with reality. */ @@ -411,7 +395,6 @@ continue; } new->name = processor_name; - cpus[i].dev = new; }
return max_cpus; @@ -587,9 +570,6 @@
if (info->index != 0) printk(BIOS_CRIT, "BSP index(%d) != 0!\n", info->index); - - /* Track BSP in cpu_map structures. */ - add_cpu_map_entry(info); }
/* @@ -667,15 +647,6 @@ cpu_initialize(info->index); }
-/* Returns APIC id for coreboot CPU number or < 0 on failure. */ -int mp_get_apic_id(int logical_cpu) -{ - if (logical_cpu >= CONFIG_MAX_CPUS || logical_cpu < 0) - return -1; - - return cpus[logical_cpu].default_apic_id; -} - void smm_initiate_relocation_parallel(void) { if ((lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY)) { @@ -769,7 +740,7 @@ struct smm_runtime *runtime = smm_params->runtime;
for (i = 0; i < CONFIG_MAX_CPUS; i++) - runtime->apic_id_to_cpu[i] = mp_get_apic_id(i); + runtime->apic_id_to_cpu[i] = cpu_get_apic_id(i); }
static int install_relocation_handler(int num_cpus, size_t save_state_size) @@ -1001,12 +972,12 @@ }
static struct mp_flight_record mp_steps[] = { + /* Initialize each CPU through the driver framework. */ + MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu), /* Once the APs are up load the SMM handlers. */ MP_FR_BLOCK_APS(NULL, load_smm_handlers), /* Perform SMM relocation. */ MP_FR_NOBLOCK_APS(trigger_smm_relocation, trigger_smm_relocation), - /* Initialize each CPU through the driver framework. */ - MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu), /* Wait for APs to finish then optionally start looking for work. */ MP_FR_BLOCK_APS(ap_wait_for_instruction, NULL), }; diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index 60940f0..7cdbbd3 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -5,6 +5,8 @@
#if !defined(__ROMCC__) void cpu_initialize(unsigned int cpu_index); +/* Returns APIC id for coreboot CPU number or < 0 on failure. */ +int cpu_get_apic_id(int logical_cpu); struct bus; void initialize_cpus(struct bus *cpu_bus); asmlinkage void secondary_cpu_init(unsigned int cpu_index); diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h index 9789910..c04252e 100644 --- a/src/include/cpu/x86/mp.h +++ b/src/include/cpu/x86/mp.h @@ -145,9 +145,6 @@ */ int mp_park_aps(void);
-/* Returns APIC id for coreboot CPU number or < 0 on failure. */ -int mp_get_apic_id(int logical_cpu); - /* * SMM helpers to use with initializing CPUs. */