7 Feb
2020
7 Feb
'20
11:59 p.m.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36221 )
Change subject: Add configurable ramstage support for minimal PCI scanning ......................................................................
Patch Set 15:
(1 comment)
Subrata, did you rebase patchset #7 and push it as #15?
https://review.coreboot.org/c/coreboot/+/36221/15/util/sconfig/sconfig.tab.h... File util/sconfig/sconfig.tab.h_shipped:
https://review.coreboot.org/c/coreboot/+/36221/15/util/sconfig/sconfig.tab.h... PS15, Line 34: # define YY_YY_HOME_RMINNICH_PROJECTS_LINUXBOOT_COREBOOTNERF_GITHUBCOREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED Are you sure you want these or did you not review the work?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I2073d9f8e9297c2b02530821ebb634ea2a5c758e
Gerrit-Change-Number: 36221
Gerrit-PatchSet: 15
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