Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44549 )
Change subject: memory_info: Rename ddr_frequency to ddr_speed_mts ......................................................................
memory_info: Rename ddr_frequency to ddr_speed_mts
This is correcting a legacy misnaming of this field. From SMBIOS 3.0 spec: Memory speed is expressed in megatransfers per second (MT/s). Previous revisions (3.0.0 and earlier) of this specification used MHz to indicate clock speed. With double data rate memory, clock speed is distinct from transfer rate, since data is transferred on both the rising and the falling edges of the clock signal. This maintains backward compatibility with observed DDR implementations prior to this revision, which already reported transfer rate instead of clock speed, e.g., DDR4-2133 (PC4-17000) memory was reported as 2133 instead of 1066.
This change is symantec only, no logical change.
Change-Id: Iaa75401f9fc33642dbdce6c69bd9b20f96d1cc25 Signed-off-by: Rob Barnes robbarnes@google.com --- M src/arch/x86/smbios.c M src/device/dram/ddr3.c M src/device/dram/ddr4.c M src/include/memory_info.h M src/mainboard/google/cyan/spd/spd.c M src/soc/amd/common/block/pi/amd_late_init.c M src/soc/amd/picasso/dmi.c M src/soc/intel/broadwell/include/soc/pei_data.h M src/soc/intel/common/smbios.c M src/soc/intel/denverton_ns/hob_mem.c 10 files changed, 24 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/44549/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index 6c92d03..a49e91e 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -281,8 +281,8 @@
memset(t, 0, sizeof(struct smbios_type17)); t->memory_type = dimm->ddr_type; - t->clock_speed = dimm->ddr_frequency; - t->speed = dimm->ddr_frequency; + t->clock_speed = dimm->ddr_speed_mts; + t->speed = dimm->ddr_speed_mts; t->type = SMBIOS_MEMORY_DEVICE; if (dimm->dimm_size < 0x7fff) { t->size = dimm->dimm_size; diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index 461fb65..1d529b1 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -536,7 +536,7 @@ dimm = &mem_info->dimm[mem_info->dimm_cnt]; if (info->size_mb) { dimm->ddr_type = MEMORY_TYPE_DDR3; - dimm->ddr_frequency = selected_freq; + dimm->ddr_speed_mts = selected_freq; dimm->dimm_size = info->size_mb; dimm->channel_num = channel; dimm->rank_per_dimm = info->ranks; diff --git a/src/device/dram/ddr4.c b/src/device/dram/ddr4.c index 429a9d2..41690e1 100644 --- a/src/device/dram/ddr4.c +++ b/src/device/dram/ddr4.c @@ -211,7 +211,7 @@ dimm = &mem_info->dimm[mem_info->dimm_cnt]; if (info->size_mb) { dimm->ddr_type = MEMORY_TYPE_DDR4; - dimm->ddr_frequency = selected_freq; + dimm->ddr_speed_mts = selected_freq; dimm->dimm_size = info->size_mb; dimm->channel_num = channel; dimm->rank_per_dimm = info->ranks; diff --git a/src/include/memory_info.h b/src/include/memory_info.h index f4a2009..26b42f4 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -28,7 +28,12 @@ * See the smbios.h smbios_memory_type enum. */ uint16_t ddr_type; - uint16_t ddr_frequency; + /* + * This field used to be called ddr_frequency, however it is actually + * being used used to store ddr speed in MT/s. SMBIOS version 3.0 made + * this change offical. + */ + uint16_t ddr_speed_mts; uint8_t rank_per_dimm; uint8_t channel_num; uint8_t dimm_num; diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c index 1c08d90..e62b0a5 100644 --- a/src/mainboard/google/cyan/spd/spd.c +++ b/src/mainboard/google/cyan/spd/spd.c @@ -122,10 +122,10 @@ hob_ptr = get_next_guid_hob(&memory_info_hob_guid, hob_list_ptr); if (hob_ptr != NULL) { memory_info_hob = (FSP_SMBIOS_MEMORY_INFO *)(hob_ptr + 1); - dimm->ddr_frequency = memory_info_hob->MemoryFrequencyInMHz; + dimm->ddr_speed_mts = memory_info_hob->MemoryFrequencyInMHz; } else { printk(BIOS_ERR, "Can't get memory info hob pointer\n"); - dimm->ddr_frequency = 0; + dimm->ddr_speed_mts = 0; }
/* Parse the SPD data to determine the DIMM information */ diff --git a/src/soc/amd/common/block/pi/amd_late_init.c b/src/soc/amd/common/block/pi/amd_late_init.c index 25aaea3..0daad16 100644 --- a/src/soc/amd/common/block/pi/amd_late_init.c +++ b/src/soc/amd/common/block/pi/amd_late_init.c @@ -28,11 +28,11 @@ dimm->ddr_type = dmi17->MemoryType;
/* - * dimm_info uses ddr_frequency for setting both config speed and max + * dimm_info uses ddr_speed_mts for setting both config speed and max * speed. Lets use config speed so we don't get the false impression * that the RAM is running faster than it actually is. */ - dimm->ddr_frequency = dmi17->ConfigSpeed; + dimm->ddr_speed_mts = dmi17->ConfigSpeed;
dimm->rank_per_dimm = dmi17->Attributes;
@@ -55,7 +55,7 @@ "CBMEM_ID_MEMINFO:\n" " dimm_size: %u\n" " ddr_type: 0x%hx\n" - " ddr_frequency: %hu\n" + " ddr_speed_mts: %hu\n" " rank_per_dimm: %hhu\n" " channel_num: %hhu\n" " dimm_num: %hhu\n" @@ -67,7 +67,7 @@ " module_part_number(%zu): %s\n", dimm->dimm_size, dimm->ddr_type, - dimm->ddr_frequency, + dimm->ddr_speed_mts, dimm->rank_per_dimm, dimm->channel_num, dimm->dimm_num, diff --git a/src/soc/amd/picasso/dmi.c b/src/soc/amd/picasso/dmi.c index d3101b7..a3b8a1a 100644 --- a/src/soc/amd/picasso/dmi.c +++ b/src/soc/amd/picasso/dmi.c @@ -28,14 +28,12 @@ dimm->ddr_type = dmi17->MemoryType;
/** - * Based on the name, ddr_frequency should hold the memory clock - * frequency in Mhz. However it is interpreted as MT/s in SMBIOS - * downstream. So multiply by 2 to translate to memory speed in MT/s. - * ddr_frequency is used for setting both config speed and max + * Multiply by 2 to translate MHz to memory speed in MT/s. + * ddr_speed_mts is used for setting both config speed and max * speed. Using config speed so we don't get the false impression * that the RAM is running faster than it actually is. */ - dimm->ddr_frequency = dmi17->ConfigSpeed*2; + dimm->ddr_speed_mts = 2 * dmi17->ConfigSpeed;
dimm->rank_per_dimm = dmi17->Attributes;
@@ -58,7 +56,7 @@ "CBMEM_ID_MEMINFO:\n" " dimm_size: %u\n" " ddr_type: 0x%hx\n" - " ddr_frequency: %hu\n" + " ddr_speed_mts: %hu\n" " rank_per_dimm: %hhu\n" " channel_num: %hhu\n" " dimm_num: %hhu\n" @@ -70,7 +68,7 @@ " module_part_number(%zu): %s\n", dimm->dimm_size, dimm->ddr_type, - dimm->ddr_frequency, + dimm->ddr_speed_mts, dimm->rank_per_dimm, dimm->channel_num, dimm->dimm_num, diff --git a/src/soc/intel/broadwell/include/soc/pei_data.h b/src/soc/intel/broadwell/include/soc/pei_data.h index 39c48d3..85b9b1d 100644 --- a/src/soc/intel/broadwell/include/soc/pei_data.h +++ b/src/soc/intel/broadwell/include/soc/pei_data.h @@ -82,7 +82,7 @@ * See the smbios.h smbios_memory_device_type enum. */ uint16_t ddr_type; - uint16_t ddr_frequency; + uint16_t ddr_speed_mts; uint8_t rank_per_dimm; uint8_t channel_num; uint8_t dimm_num; diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c index 5e3560c..07d2d93 100644 --- a/src/soc/intel/common/smbios.c +++ b/src/soc/intel/common/smbios.c @@ -39,7 +39,7 @@ } dimm->dimm_size = dimm_capacity; dimm->ddr_type = ddr_type; - dimm->ddr_frequency = frequency; + dimm->ddr_speed_mts = frequency; dimm->rank_per_dimm = rank_per_dimm; dimm->channel_num = channel_id; dimm->dimm_num = dimm_id; diff --git a/src/soc/intel/denverton_ns/hob_mem.c b/src/soc/intel/denverton_ns/hob_mem.c index 326e716..3642b9e 100644 --- a/src/soc/intel/denverton_ns/hob_mem.c +++ b/src/soc/intel/denverton_ns/hob_mem.c @@ -62,7 +62,7 @@ dimm_info->SizeInMb; mem_info->dimm[index].ddr_type = memory_info_hob->MemoryType; - mem_info->dimm[index].ddr_frequency = + mem_info->dimm[index].ddr_speed_mts = memory_info_hob->MemoryFrequencyInMHz; mem_info->dimm[index].channel_num = channel_info->ChannelId;