[coreboot-gerrit] Change in coreboot[master]: mb/intel/adlrvp: Enable CPU PCIe RP 2

[Meera Ravindranath (Code Review)]

Attention is currently required from: Rizwan Qureshi.
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59392 )

Change subject: mb/intel/adlrvp: Enable CPU PCIe RP 2
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/59392/comment/4820c3ea_4fdb1849 
PS2, Line 9: commit:3fd39467b Fix S0ix regression
> what fixes the S0ix regression now? just the FIVR change?

Clksrc 3 disable is needed for S0ix regression. But since we can't push it upstream, the alternative is to disable it via FIT.