Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38504 )
Change subject: soc/intel/tigerlake: Enable SATA ......................................................................
Patch Set 1:
(25 comments)
https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... File src/soc/intel/tigerlake/fsp_params_tgl.c:
https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 124: /* SATA */
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 125: dev = pcidev_on_root(PCH_DEV_SLOT_SATA, 0);
code indent should use tabs where possible
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 125: dev = pcidev_on_root(PCH_DEV_SLOT_SATA, 0);
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 126: if (!dev)
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 126: if (!dev)
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 127: params->SataEnable = 0;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 127: params->SataEnable = 0;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 128: else {
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 128: else {
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 129: params->SataEnable = dev->enabled;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 129: params->SataEnable = dev->enabled;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 130: params->SataMode = config->SataMode;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 130: params->SataMode = config->SataMode;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 131: params->SataSalpSupport = config->SataSalpSupport;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 131: params->SataSalpSupport = config->SataSalpSupport;
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 132: memcpy(params->SataPortsEnable, config->SataPortsEnable,
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 132: memcpy(params->SataPortsEnable, config->SataPortsEnable,
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 133: sizeof(params->SataPortsEnable));
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 133: sizeof(params->SataPortsEnable));
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 134: memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp,
code indent should use tabs where possible
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 134: memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp,
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 135: sizeof(params->SataPortsDevSlp));
code indent should use tabs where possible
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 135: sizeof(params->SataPortsDevSlp));
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 136: }
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https://review.coreboot.org/c/coreboot/+/38504/1/src/soc/intel/tigerlake/fsp... PS1, Line 136: }
code indent should use tabs where possible
Ack