Cole Nelson has uploaded a new change for review. ( https://review.coreboot.org/19768 )
Change subject: soc/intel/apollolake: configure RAPL PL1 for GLK ......................................................................
soc/intel/apollolake: configure RAPL PL1 for GLK
Tested on GLK w/kernel 4.11.0 by reading MSR 0x610 at runtime.
Change-Id: Ic4753585c4feea53367fe5a69de25f1f677bbdd4 Signed-off-by: Cole Nelson colex.nelson@intel.com --- M src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/19768/1
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index 86bb055..e881a09 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -52,10 +52,8 @@ # Enable DPTF register "dptf_enable" = "1"
- # PL1 override 12000 mW: the energy calculation is wrong with the - # current VR solution. Experiments show that SoC TDP max (6W) can - # be reached when RAPL PL1 is set to 12W. - register "tdp_pl1_override_mw" = "12000" + # PL1 override + register "tdp_pl1_override_mw" = "7500" # Set RAPL PL2 to 15W. register "tdp_pl2_override_mw" = "15000"