[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/alderlake: Correctly set CNVi Reset and Clkreq pins

[Sean Rhodes (Code Review)]

Attention is currently required from: Dinesh Gehlot, Felix Held, Kapil Porwal, Nick Vaccaro, Subrata Banik.

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81080?usp=email )

Change subject: soc/intel/alderlake: Correctly set CNVi Reset and Clkreq pins
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Patch Set 3:

(1 comment)

File src/soc/intel/alderlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/81080/comment/d3fa2c29_ab54c094 :
PS3, Line 839: 	if (CONFIG(SOC_ESPI)) {
> hmm, looks like SOC_ESPI is defined in the apollolake kconfig, but this is alderlake. […]

Oh, good point. Could tie it do 1f.0 I guess? Or just put it on my default?