Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75357?usp=email )
Change subject: cpu: Enable per-CPUID microcode loading in CBFS
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Patch Set 25:
(1 comment)
File src/cpu/intel/microcode/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/75357/comment/7eb88b49_0d5ad26a :
PS25, Line 22: CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
not sure if there are different ucode binary alignment requirements on intel socs depending on some option, but this amd soc option probably doesn't apply here
good point. I will submit a CL to drop this check. This is not required here
CB:76397. please help to check
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