Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36382 )
Change subject: cpu/x86/mtrr: Add function to set MTRR with CR0.CD set ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36382/1/src/cpu/x86/mtrr/Makefile.i... File src/cpu/x86/mtrr/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/36382/1/src/cpu/x86/mtrr/Makefile.i... PS1, Line 7: verstage-y += set_mtrr.S
but I think from your other patch that the ABI this function is implementing will not work. Are you assuming the caller in 64-bit mode will work w/ this assembly?
Oh right... asmlinkage should do the trick?
Even with asmlinkage the sysv 64bit ABI is used with arguments on %rdi,%rsi and %rdx. Do we really want to insist on doing this with CR0.CD set? It works fine without on all CPUs this code currently targets (Intel core and core2). It might be useful for amdfam10 where L2 cache used for WP-IO does L2 cache eviction but from amdfam15 onward L2 WP-IO does not cause L2 eviction (anymore) according to BKDG. We are about to drop amdfam10 support, so..