Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43908 )
Change subject: mb/intel/kblrvp: Factor out `HeciEnabled` ......................................................................
mb/intel/kblrvp: Factor out `HeciEnabled`
RVP8 does not set it, and the other variants set it to zero. So, factor it out. It does not match the devicetree, so also add a FIXME comment.
Tested with BUILD_TIMELESS=1, Intel RVP7 does not change.
Change-Id: I67c958af2dc955d07b895dc93fbe2232dbd48d34 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb 4 files changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/43908/1
diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index 898739c..60cbb4e 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -127,7 +127,11 @@ device pci 15.1 on end # I2C #1 device pci 15.2 on end # I2C #2 device pci 15.3 on end # I2C #3 - device pci 16.0 on end # Management Engine Interface 1 + device pci 16.0 on # Management Engine Interface 1 + + # FIXME: does not match devicetree! + register "HeciEnabled" = "0" + end device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index a269d01..355f199 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -10,7 +10,6 @@ register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "0" - register "HeciEnabled" = "0" register "PmTimerDisabled" = "1" register "Cio2Enable" = "1" register "SaImguEnable" = "1" diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index 07d7385..a0984ea 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -14,7 +14,6 @@ register "gen2_dec" = "0x000c0201"
# FSP Configuration - register "HeciEnabled" = "0" register "PmTimerDisabled" = "1"
# VR Settings Configuration for 4 Domains diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 91abfe6..f15072c 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -8,7 +8,6 @@ register "ScsEmmcEnabled" = "0" register "ScsEmmcHs400Enabled" = "0" register "ScsSdCardEnabled" = "0" - register "HeciEnabled" = "0" register "PmTimerDisabled" = "0"
register "serirq_mode" = "SERIRQ_CONTINUOUS"