Chris Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71647 )
Change subject: mb/googmb/google/skyrim/var/winterhold: enable dxio_tx_vboost_enable for PCIe optimization ......................................................................
mb/googmb/google/skyrim/var/winterhold: enable dxio_tx_vboost_enable for PCIe optimization
Turn on the dxio_tx_vboost_enable for winterhold/whiterun in coreboot.
It needs to confirm the PCIe Signal Integrity after enabled.
BUG=b:259622787 BRANCH=none TEST=confirm the setting has been set correspondingly with checking the FSP log.
Signed-off-by: Chris.Wang chris.wang@amd.corp-partner.google.com Change-Id: I6aad3d9118180d2ffdfba38abc80b175b6f103bd --- M src/mainboard/google/skyrim/variants/winterhold/overridetree.cb 1 file changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/71647/1
diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb index 9d226f1..c12a0f2 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb @@ -99,6 +99,9 @@ register "stt_skin_temp_apu_F" = "0x3200"
device domain 0 on + + register "dxio_tx_vboost_enable" = "1" + device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref xhci_1 on # XHCI1 controller chip drivers/usb/acpi