Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39329 )
Change subject: soc/intel/tigerlake: allow override of clock sources ......................................................................
Patch Set 1: Code-Review-1
(2 comments)
This change is not really required.
https://review.coreboot.org/c/coreboot/+/39329/1/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params_tgl.c:
https://review.coreboot.org/c/coreboot/+/39329/1/src/soc/intel/tigerlake/rom... PS1, Line 46: memcpy(m_cfg->PcieClkSrcUsage, config->PcieClkSrcUsage, : sizeof(config->PcieClkSrcUsage)); This is exactly the same as lines 51-52 that you are adding. It was done as part of: https://review.coreboot.org/c/coreboot/+/37960/28/src/soc/intel/tigerlake/ro...
https://review.coreboot.org/c/coreboot/+/39329/1/src/soc/intel/tigerlake/rom... PS1, Line 59: memcpy(m_cfg->PcieClkSrcClkReq, config->PcieClkSrcClkReq, : sizeof(config->PcieClkSrcClkReq)); This is exactly the same as lines 48-49 above. It was done as part of: https://review.coreboot.org/c/coreboot/+/38285