Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12466
-gerrit
commit 782fa5f17e43b184d26877278911b9c39e139253 Author: Stefan Reinauer stefan.reinauer@coreboot.org Date: Wed Nov 18 15:31:15 2015 -0800
intel/skylake: Fix flash_controller.c compilation
Change-Id: Ib8a0e1ebc76b7dca3dd785b09398b73abad46366 Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org --- src/soc/intel/skylake/flash_controller.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c index a68c1e9..5ba2d4e 100644 --- a/src/soc/intel/skylake/flash_controller.c +++ b/src/soc/intel/skylake/flash_controller.c @@ -53,7 +53,7 @@ static inline uint32_t spi_read_faddr(pch_spi_regs * const regs) static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms, size_t len) { - uint16_t hsfs; + uint16_t hsfs = 0; uint16_t hsfc; uint32_t addr; struct stopwatch sw; @@ -72,7 +72,7 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms, addr = spi_read_faddr(regs); hsfc = spi_read_hsfc(regs); printk(BIOS_ERR, "%ld ms Transaction timeout between offset " - "0x%08x and 0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", + "0x%08x and 0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", stopwatch_duration_msecs(&sw), addr, addr + len - 1, addr, len - 1, hsfc, hsfs); return 1; @@ -82,7 +82,7 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms, addr = spi_read_faddr(regs); hsfc = spi_read_hsfc(regs); printk(BIOS_ERR, "Transaction error between offset 0x%08x and " - "0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", + "0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", addr, addr + len - 1, addr, len - 1, hsfc, hsfs); return 1;