[coreboot-gerrit] Change in coreboot[master]: soc/xeon_sp: Read PPIN MSR and save to an array for each CPU

[Johnny Lin (Code Review)]

Hello build bot (Jenkins), Andrey Petrov, Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40523

to look at the new patch set (#5).

Change subject: soc/xeon_sp: Read PPIN MSR and save to an array for each CPU
......................................................................

soc/xeon_sp: Read PPIN MSR and save to an array for each CPU

PPIN (Protected Processor Inventory Number) MSR is read and saved to an
array during xeon_sp_core_init() for each CPU for later use, such as
SMBIOS type 11 OEM string population.

Tested on OCP Tioga Pass.

Signed-off-by: Johnny Lin 
Change-Id: I5e1de8bcb651fb8ae8b106db1978235b0dd84c47
---
M src/soc/intel/xeon_sp/skx/cpu.c
M src/soc/intel/xeon_sp/skx/include/soc/msr.h
2 files changed, 22 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/40523/5