Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48508 )
Change subject: soc/amd/picasso: rename PICASSO_CONSOLE_UART to AMD_SOC_CONSOLE_UART ......................................................................
soc/amd/picasso: rename PICASSO_CONSOLE_UART to AMD_SOC_CONSOLE_UART
This allows factoring out the common initialization for the integrated UARTs.
Change-Id: I7399a13b9280b732086c6f8e6dfd9f1207d8c8ff Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/amd/mandolin/Kconfig M src/mainboard/google/zork/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/aoac.c M src/soc/amd/picasso/early_fch.c 6 files changed, 15 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/48508/1
diff --git a/src/mainboard/amd/mandolin/Kconfig b/src/mainboard/amd/mandolin/Kconfig index 6776621..c1d68fa 100644 --- a/src/mainboard/amd/mandolin/Kconfig +++ b/src/mainboard/amd/mandolin/Kconfig @@ -12,7 +12,7 @@ select AZALIA_PLUGIN_SUPPORT select HAVE_ACPI_RESUME select DRIVERS_UART_ACPI - select PICASSO_CONSOLE_UART if !AMD_LPC_DEBUG_CARD + select AMD_SOC_CONSOLE_UART if !AMD_LPC_DEBUG_CARD
config FMDFILE string @@ -26,7 +26,7 @@ help AMD's debug card contains an SMSC SIO1036 device which provides an I/O-mapped UART in the system. This is mutually exclusive with - PICASSO_CONSOLE_UART which selects the SoC's integrated memory-mapped + AMD_SOC_CONSOLE_UART which selects the SoC's integrated memory-mapped UART for coreboot console output.
choice diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index d861f1d..c1cbae9 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -34,7 +34,7 @@ select GFXUMA select GOOGLE_SMBIOS_MAINBOARD_VERSION select MAINBOARD_HAS_CHROMEOS - select PICASSO_CONSOLE_UART + select AMD_SOC_CONSOLE_UART select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 select PCIEXP_ASPM diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index bd9964b..ab926aa 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -273,7 +273,7 @@ help Base address for the ACPI registers.
-config PICASSO_CONSOLE_UART +config AMD_SOC_CONSOLE_UART bool "Use Picasso UART controller for console" default n select DRIVERS_UART_8250MEM @@ -289,7 +289,7 @@
choice prompt "UART Frequency" - depends on PICASSO_CONSOLE_UART + depends on AMD_SOC_CONSOLE_UART default PICASSO_UART_48MZ
config PICASSO_UART_48MZ @@ -313,7 +313,7 @@ present when this option is used.
config CONSOLE_UART_BASE_ADDRESS - depends on CONSOLE_SERIAL && PICASSO_CONSOLE_UART + depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART hex default 0xfedc9000 if UART_FOR_CONSOLE = 0 default 0xfedca000 if UART_FOR_CONSOLE = 1 diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 7cbae92..783517d 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -16,7 +16,7 @@ bootblock-y += early_fch.c bootblock-y += i2c.c bootblock-y += uart.c -bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +bootblock-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c bootblock-y += gpio.c bootblock-y += reset.c
@@ -26,14 +26,14 @@ romstage-y += reset.c romstage-y += memmap.c romstage-y += uart.c -romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +romstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c romstage-y += psp.c romstage-y += mrc_cache.c
verstage-y += i2c.c verstage_x86-y += gpio.c verstage_x86-y += uart.c -verstage_x86-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +verstage_x86-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c verstage_x86-y += reset.c
ramstage-y += i2c.c @@ -52,7 +52,7 @@ ramstage-y += memmap.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-y += uart.c -ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +ramstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c ramstage-y += finalize.c ramstage-y += soc_util.c ramstage-y += psp.c @@ -66,7 +66,7 @@ smm-y += smihandler.c ifeq ($(CONFIG_DEBUG_SMI),y) smm-y += uart.c -smm-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c +smm-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c endif smm-y += gpio.c smm-y += psp.c diff --git a/src/soc/amd/picasso/aoac.c b/src/soc/amd/picasso/aoac.c index c97700d..aed6d74 100644 --- a/src/soc/amd/picasso/aoac.c +++ b/src/soc/amd/picasso/aoac.c @@ -12,7 +12,7 @@ : CONFIG_UART_FOR_CONSOLE == 2 ? FCH_AOAC_DEV_UART2 \ : CONFIG_UART_FOR_CONSOLE == 3 ? FCH_AOAC_DEV_UART3 \ : -1) -#if CONFIG(PICASSO_CONSOLE_UART) && FCH_AOAC_UART_FOR_CONSOLE == -1 +#if CONFIG(AMD_SOC_CONSOLE_UART) && FCH_AOAC_UART_FOR_CONSOLE == -1 # error Unsupported UART_FOR_CONSOLE chosen #endif
@@ -43,13 +43,13 @@ for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) power_on_aoac_device(aoac_devs[i]);
- if (CONFIG(PICASSO_CONSOLE_UART)) + if (CONFIG(AMD_SOC_CONSOLE_UART)) power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
/* Wait for AOAC devices to indicate power and clock OK */ for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) wait_for_aoac_enabled(aoac_devs[i]);
- if (CONFIG(PICASSO_CONSOLE_UART)) + if (CONFIG(AMD_SOC_CONSOLE_UART)) wait_for_aoac_enabled(FCH_AOAC_UART_FOR_CONSOLE); } diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index f56a758..a9118ad 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -39,7 +39,7 @@ */ clear_uart_legacy_config();
- if (CONFIG(PICASSO_CONSOLE_UART)) + if (CONFIG(AMD_SOC_CONSOLE_UART)) set_uart_config(CONFIG_UART_FOR_CONSOLE); }