Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32337 )
Change subject: vendorcode/google/chromeos: Add CHROMEOS_SOC_DEBUG_CONSENT Kconfig ......................................................................
Patch Set 2:
Patch Set 2:
This sounds like something that probably belons in soc/intel/common instead (although I don't fully understand the purpose yet tbh).
Yes, this is something which is very Intel specific at this point and it should be put into soc/intel/common/Kconfig
To provide some background: Kane is working on providing an easy way to generate coreboot builds that allow Intel USB3 DBC debugging on Chrome OS. So, by default BIOS built for Chrome OS will not have this debug feature enabled. However, a use flag can be used something like USE="intel-dbc" to generate debug enabled image as required by the partners.
Note that if you want to enable something specifically for Chrome OS developer builds (e.g. builds that have serial console enabled), the correct place to set it is in the fwserial.<board> config file in the coreboot ebuild in the Chromium source tree. We probably wouldn't want debug features to be enabled on production Chromebooks either?
This feature will not be enabled on production or serial console enabled binaries by default. It is mostly to provide an easy way for partners to build BIOS images without having to make changes in code.
Kane, I think the right way to do this would be:
1. Add this Kconfig to soc/intel/common - SOC_INTEL_DEBUG_CONSENT 2. In specific SoCs(e.g. cannonlake), you can set DEBUG_CONSENT_CANNONLAKE to DBC if CHROMEOS and SOC_INTEL_DEBUG_CONSENT are selected. Then you don't have to make changes to mainboard as well.