[coreboot-gerrit] [S] Change in coreboot[master]: mb/google/brya/var/marasov: Add the FIVR configurations

[Frank Chu (Code Review)]

Frank Chu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70233 )

Change subject: mb/google/brya/var/marasov: Add the FIVR configurations
......................................................................

mb/google/brya/var/marasov: Add the FIVR configurations

This patch enables V1p05 and Vnn external bypass VRs for Banshee.

BUG=b:260565911
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage

Signed-off-by: Frank Chu 
Change-Id: Id28305b02e86f5ac55382ac6d2bd5e0453aae9b4
---
M src/mainboard/google/brya/variants/marasov/overridetree.cb
1 file changed, 30 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/70233/1

diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb
index 70787c6..f2b8ed9 100644
--- a/src/mainboard/google/brya/variants/marasov/overridetree.cb
+++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb
@@ -49,6 +49,20 @@
    	},
    }"
    register "sagv" = "SaGv_Enabled"
+
+	register "ext_fivr_settings" = "{
+		.configure_ext_fivr = 1,
+		.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
+		.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
+		.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
+							FIVR_VOLTAGE_MIN_ACTIVE |
+							FIVR_VOLTAGE_MIN_RETENTION,
+		.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
+							FIVR_VOLTAGE_MIN_ACTIVE |
+							FIVR_VOLTAGE_MIN_RETENTION,
+		.v1p05_icc_max_ma = 500,
+		.vnn_sx_voltage_mv = 1250,
+	}"
    register "serial_io_i2c_mode" = "{
    	[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
    }"