Attention is currently required from: Angel Pons, Felix Held.
yuchi.chen@intel.com has posted comments on this change by yuchi.chen@intel.com. ( https://review.coreboot.org/c/coreboot/+/85012?usp=email )
Change subject: soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
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Patch Set 7:
(1 comment)
File src/soc/intel/common/block/itss/itss.c:
https://review.coreboot.org/c/coreboot/+/85012/comment/9c89a65f_629fe3af?usp... :
PS5, Line 138: enum pirq itss_get_dev_pirq(struct device *dev, enum pci_pin pin)
Huh, I don't see `itss_get_dev_pirq` getting called in CB:85013 though.
For usage, you can find it at https://review.coreboot.org/c/coreboot/+/83321/52/src/soc/intel/snowridge/ac... and https://review.coreboot.org/c/coreboot/+/83321/52/src/soc/intel/snowridge/lp...
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