Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35618 )
Change subject: [DO NOT SUBMIT] Dump full calibration params ......................................................................
[DO NOT SUBMIT] Dump full calibration params
This patch is only for debugging.
Change-Id: I04ec044776f2168a149a21a199b0adb0aa68e46f Signed-off-by: Yu-Ping Wu yupingso@chromium.org --- M src/mainboard/google/kukui/romstage.c M src/soc/mediatek/mt8183/Kconfig M src/soc/mediatek/mt8183/emi.c M src/soc/mediatek/mt8183/include/soc/emi.h 4 files changed, 54 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/35618/1
diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c old mode 100644 new mode 100755 index 2fbc789..0359887 --- a/src/mainboard/google/kukui/romstage.c +++ b/src/mainboard/google/kukui/romstage.c @@ -108,6 +108,9 @@ if (err == 0) { printk(BIOS_INFO, "successfully load dram_blob and " "run DRAM calibration\n"); + just_for_test_dump_coreboot_params(&freq_params[DRAM_DFS_SHUFFLE_1]); + just_for_test_dump_coreboot_params(&freq_params[DRAM_DFS_SHUFFLE_2]); + just_for_test_dump_coreboot_params(&freq_params[DRAM_DFS_SHUFFLE_3]); write_calibration_data_to_flash(freq_params); return; } diff --git a/src/soc/mediatek/mt8183/Kconfig b/src/soc/mediatek/mt8183/Kconfig old mode 100644 new mode 100755 index 576f2d5..ba65aa5 --- a/src/soc/mediatek/mt8183/Kconfig +++ b/src/soc/mediatek/mt8183/Kconfig @@ -19,7 +19,7 @@
config DEBUG_DRAM bool "Output verbose DRAM related debug messages" - default n + default y help This option enables additional DRAM related debug messages.
diff --git a/src/soc/mediatek/mt8183/emi.c b/src/soc/mediatek/mt8183/emi.c old mode 100644 new mode 100755 index dfd59b1..1b0c120 --- a/src/soc/mediatek/mt8183/emi.c +++ b/src/soc/mediatek/mt8183/emi.c @@ -65,6 +65,9 @@
bool have_calibration_params(const struct sdram_params *params) { + dramc_show("calibration_result_start:%#x, calibration_result_end:%#x\n", + params->calibration_result_start, + params->calibration_result_end); return (params->calibration_result_start == PARAM_START_PATTERN && params->calibration_result_end == PARAM_END_PATTERN); } @@ -477,6 +480,48 @@ } #endif
+void just_for_test_dump_coreboot_params(const struct sdram_params *params) +{ + dramc_show("%s dump params calibration_result_start\n", __func__); + dramc_show("calibration_result_start = 0x%x\n", params->calibration_result_start); + + dramc_show("dump params frequency:%d\n", params->frequency); + + dramc_show("\n dump params write leveling\n"); + for (u8 chn = 0; chn < 2; chn++) + for (u8 rk = 0; rk < 2; rk++) + for (u8 dqs = 0; dqs < 2; dqs++) + dramc_show("write leveling[%d][%d][%d] = 0x%x\n", + chn, rk, dqs, params->wr_level[chn][rk][dqs]); + + dramc_show("dump params cbt_cs\n"); + for (u8 chn = 0; chn < 2; chn++) + for (u8 rk = 0; rk < 2; rk++) + dramc_show("cbt_cs[%d][%d] = 0x%x\n", + chn, rk, params->cbt_cs_dly[chn][rk]); + + dramc_show("dump params cbt_mr12\n"); + for (u8 chn = 0; chn < 2; chn++) + for (u8 rk = 0; rk < 2; rk++) + dramc_show("cbt_mr12[%d][%d] = 0x%x\n", + chn, rk, params->cbt_final_vref[chn][rk]); + + dramc_show("dump params clk_delay\n"); + for (u8 chn = 0; chn < 2; chn++) + dramc_show("clk_delay[%d] = %d\n", chn, params->duty_clk_delay[chn]); + + dramc_show("dump params dqs_delay\n"); + for (u8 chn = 0; chn < 2; chn++) + for (u8 dqs = 0; dqs < 2; dqs++) + dramc_show("dqs_delay[%d][%d] = %d\n", + chn, dqs, params->duty_dqs_delay[chn][dqs]); + + dramc_show("dump params delay_cell_unit\n"); + dramc_show("delay_cell_unit = %d\n", params->delay_cell_unit); + dramc_show("calibration_result_end = 0x%x\n", params->calibration_result_end); + +} + void mt_set_emi(const struct sdram_params *freq_params) { int freq_shuffle = DRAM_DFS_SHUFFLE_1; @@ -489,6 +534,8 @@ u8 current_freqsel = freq_tbl[freq_shuffle]; params = &freq_params[freq_shuffle];
+ just_for_test_dump_coreboot_params(params); + init_dram(params, current_freqsel); do_calib(params, current_freqsel);
diff --git a/src/soc/mediatek/mt8183/include/soc/emi.h b/src/soc/mediatek/mt8183/include/soc/emi.h old mode 100644 new mode 100755 index cdaadbc..55a2b0e --- a/src/soc/mediatek/mt8183/include/soc/emi.h +++ b/src/soc/mediatek/mt8183/include/soc/emi.h @@ -88,4 +88,7 @@ bool have_calibration_params(const struct sdram_params *params); void clean_calibration_data(void);
+void just_for_test_dump_coreboot_params(const struct sdram_params *params); + + #endif /* SOC_MEDIATEK_MT8183_EMI_H */