[coreboot-gerrit] Change in coreboot[master]: soc/xeon_sp/cpx: Define MSR PPIN related registers

[Johnny Lin (Code Review)]

Hello build bot (Jenkins), Maxim Polyakov, Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41278

to look at the new patch set (#3).

Change subject: soc/xeon_sp/cpx: Define MSR PPIN related registers
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soc/xeon_sp/cpx: Define MSR PPIN related registers

These changes are in accordance with the documentation:
[*] page 208-209
    Intel(R) 64 and IA-32 Architectures, Software Developer’s Manual,
    Volume 4: Model-Specific Registers. May 2019.
    Order Number: 335592-070US

Tested on OCP DeltaLake with change
https://review.coreboot.org/c/coreboot/+/40308/

Signed-off-by: Johnny Lin 
Change-Id: I87134b2e98c9b0c031be9375b75a2aa1284ae9bb
---
M src/soc/intel/xeon_sp/cpx/include/soc/msr.h
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/41278/3