[coreboot-gerrit] Change in coreboot[master]: [NOT TESTED]mainboard/asus/a8v-e_deluxe: Fix w83627ehg registers

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/23849

Change subject: [NOT TESTED]mainboard/asus/a8v-e_deluxe: Fix w83627ehg registers
......................................................................

[NOT TESTED]mainboard/asus/a8v-e_deluxe: Fix w83627ehg registers

CR 0x24, 0x2a and 0x2c are
global control registers.

Change-Id: If1be087e4b964cb7a782a574f2b9e007c71f8393
Signed-off-by: Elyes HAOUAS 
---
M src/mainboard/asus/a8v-e_deluxe/romstage.c
1 file changed, 9 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/23849/1

diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index 5ade055..556884d 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -46,6 +46,7 @@
 #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED_V)
 #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI)
+#define DUMMY_DEV PNP_DEV(0x2e, 0)

void memreset(int controllers, const struct mem_controller *ctrl) { }
 void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -94,17 +95,17 @@
 {
    u8 reg;

-	pnp_enter_conf_state(SERIAL_DEV);
+	pnp_enter_conf_state(DUMMY_DEV);
    /* We have 24MHz input. */
-	reg = pnp_read_config(SERIAL_DEV, 0x24);
-	pnp_write_config(SERIAL_DEV, 0x24, (reg & ~0x40));
+	reg = pnp_read_config(DUMMY_DEV, 0x24);
+	pnp_write_config(DUMMY_DEV, 0x24, (reg & ~0x40));
    /* We have GPIO for KB/MS pin. */
-	reg = pnp_read_config(SERIAL_DEV, 0x2a);
-	pnp_write_config(SERIAL_DEV, 0x2a, (reg | 1));
+	reg = pnp_read_config(DUMMY_DEV, 0x2a);
+	pnp_write_config(DUMMY_DEV, 0x2a, (reg | 1));
    /* We have all RESTOUT and even some reserved bits, too. */
-	reg = pnp_read_config(SERIAL_DEV, 0x2c);
-	pnp_write_config(SERIAL_DEV, 0x2c, (reg | 0xf0));
-	pnp_exit_conf_state(SERIAL_DEV);
+	reg = pnp_read_config(DUMMY_DEV, 0x2c);
+	pnp_write_config(DUMMY_DEV, 0x2c, (reg | 0xf0));
+	pnp_exit_conf_state(DUMMY_DEV);

pnp_enter_conf_state(ACPI_DEV);
    pnp_set_logical_device(ACPI_DEV);