Attention is currently required from: Appukuttan V K, Arthur Heymans, Krishna P Bhat D, Subrata Banik, Wonkyu Kim.
Hello Andrey Petrov, Krishna P Bhat D, Ronak Kanabar, Subrata Banik, Wonkyu Kim, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81661?usp=email
to look at the new patch set (#14).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned ......................................................................
drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
- Stack alignment:
1. FSP functions must be called with the stack 16-bytes aligned in x86_64 mode.This is already setup properly with the default value of the `mpreferred-stack-boundary' compiler option (4).
2. The FSP heap buffer supplied by coreboot through the `StackBase' UPD must be 16-bytes aligned. This alignment is consistent for both x86_64 and x86_32 modes to simplify the implementation.
BUG=b:329034258 TEST=Verified on Meteor Lake board (Rex)
Change-Id: I86048c5d3623a29f17a5e492cd67568e4844589c Signed-off-by: Appukuttan V K appukuttan.vk@intel.com --- M src/drivers/intel/fsp2_0/memory_init.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/81661/14